Staff or Principal Analog Design Engineer

Job Overview

Job Description

Principal Analog Design Engineer

Locations: Irvine, CA or remote + travel to Irvine

Responsibilities
• Clock generation and distribution (VCOs, PLL, clock distribution, etc)
• Design of custom passive components, from concept to silicon implementation
• Fundamental analog blocks (bandgap references, LDOs, temp sensors, etc)
• High-speed analog circuit design, such as high-speed broadband amplifiers (VGA, CTLE, DRV, etc.).
• New techniques for the development of next generation optical transceiver
• Silicon bring-up, debug and support
• Supervise analog layouts within advanced process nodes
• System verification and circuit design spec creation

Requirements
• BSEE with 10+ years or MSEE with 7+ years or PhDEE with 5+ years of High-Speed CMOS DAC/ADC/PLL Analog Design experience
• Experience in advance cmos design and verification flows (tools to evaluate self-heating, electromigration, safe operating area)
• Experience in advanced CMOS/FinFET technologies (TSMC process nodes N3, N5, N7) and optimization for high performance circuits
• Experience with analog design and verification tools (Virtuoso, Spectre, ADE and post layout extraction tools) is a must
• Experience with electromagnetic simulation tools (EMX, Momentum, HFSS or other) is a plus
• Experienced in lab chip bring-up and debugging efforts is a plus
• Good understanding of analog layouts in FinFET and its effect on high-speed designs is a plus
• Knowledge of the fundamentals on electromagnetism, lump models and high-frequency design
• Production level tape out experience
• Strong communication and documentation skills
• Should have strong analog design fundamentals and experience in designing analog circuit blocks for broadband amplification, clock generation and distribution, and/or fundamental analog blocks.

This is an exciting opportunity with a fast-growing startup company. Annual base salary, bonus, stock options, benefits, etc., will be determined based on job-related skills, experience, qualifications, and location.